Major Load please help

Vicchiullo, Rob robv at DISASTER.COM
Fri Apr 23 19:11:34 IST 2004


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Rob Vicchiullo
robv at disaster.com
http://www.disaster.com
518-218-0900

-----Original Message-----
From: MailScanner mailing list [mailto:MAILSCANNER at JISCMAIL.AC.UK] On
Behalf Of Peter Bonivart
Sent: Friday, April 23, 2004 1:50 PM
To: MAILSCANNER at JISCMAIL.AC.UK
Subject: Re: Major Load please help

Vicchiullo, Rob wrote:
> Yes I have top. It shows Mailscanner using most of everything.
> There are 10 Mailscanner processes.
> And im not sure what SAR is.
> My max children is at 10 and my loads at 7-9.

Could you run the following command for a couple of minutes to see how
your IO is:

# iostat -xcnCXTdz 5

Post the result.

--
/Peter Bonivart

--Unix lovers do it in the Sun

Sun Fire V210, Solaris 9, Sendmail 8.12.10, MailScanner 4.29.7,
SpamAssassin 2.63 + DCC 1.2.39, ClamAV 0.70 + GMP 4.1.2, Vispan 1.3

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-------------- next part --------------
Fri Apr 23 14:12:15 2004
     cpu
 us sy wt id
 14 10  7 70
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.1    0.5    0.6    3.3  0.0  0.0   18.1   24.5   1   1 d1
    1.0    0.4    6.8    3.3  0.0  0.0    3.4   11.4   0   1 d2
    0.5    0.7    6.8   10.9  0.0  0.0    6.4   15.8   1   1 d3
    0.1    0.0    0.4    0.0  0.0  0.0    0.4    4.0   0   0 d4
    0.0    0.5    0.3    3.3  0.0  0.0    0.0   25.7   0   1 d10
    0.0    0.5    0.3    3.3  0.0  0.0    0.0   12.9   0   1 d11
    0.5    0.4    3.4    3.3  0.0  0.0    0.0   16.2   0   1 d20
    0.5    0.4    3.4    3.3  0.0  0.0    0.0    8.3   0   0 d21
    0.3    0.7    3.4   10.9  0.0  0.0    0.0   16.6   0   1 d30
    0.3    0.7    3.4   10.9  0.0  0.0    0.0    8.2   0   1 d31
    0.0    0.0    0.2    0.0  0.0  0.0    0.0    5.6   0   0 d40
    0.0    0.0    0.2    0.0  0.0  0.0    0.0    3.2   0   0 d41
    1.2   40.1   13.6  334.7  0.0  0.4    0.0    9.6   0  22 c0t0d0
    0.9    2.2    7.3   24.6  0.0  0.0    0.0   11.5   0   2 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    2.4    0.8   47.1    7.8  0.0  0.0    0.2    2.4   0   1 c2t5d0
   24.7   46.2  263.2  595.3  0.0  0.2    0.7    3.0   0   9 c2t5d1
    0.0    3.1    0.0   98.1  0.0  0.0    0.0    8.8   0   3 rmt/0
Fri Apr 23 14:12:20 2004
     cpu
 us sy wt id
 30 25 30 16
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    1.2   15.4   32.0  150.8  0.1  0.7    4.1   40.0   7  41 d1
    0.2    0.0    1.6    0.0  0.0  0.0    0.0   11.9   0   0 d2
    0.0    0.6    0.0   19.2  0.0  0.0   37.8   36.2   2   2 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.6   15.2    8.0  145.2  0.0  0.6    0.0   40.3   0  41 d10
    0.6   15.2   24.0  145.2  0.0  0.2    0.0   10.0   0   9 d11
    0.2    0.0    1.6    0.0  0.0  0.0    0.0   11.9   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.6    0.0   19.2  0.0  0.0    0.0   36.2   0   2 d30
    0.0    0.6    0.0   19.2  0.0  0.0    0.0    9.8   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.2  158.4   10.4 1267.1  0.0  2.8    0.0   17.3   0  99 c0t0d0
    0.6   17.4   24.0  165.2  0.0  0.2    0.0   10.9   0  11 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    1.6    0.0   12.8  0.0  0.0    0.0    1.0   0   0 c2t5d0
    1.2   60.2   11.4  827.3  0.0  0.1    0.0    2.0   0   6 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:25 2004
     cpu
 us sy wt id
 27 32 26 15
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    5.4    0.0   76.0  0.0  0.2    0.0   41.2   0  22 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   1 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    5.4    0.0   76.0  0.0  0.2    0.0   41.2   0  22 d10
    0.0    5.6    0.0   77.6  0.0  0.0    0.0    4.2   0   2 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.2    0.0   11.2  0.0  0.0    0.0   66.3   0   1 d30
    0.0    0.4    0.0   12.8  0.0  0.0    0.0    4.2   0   0 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.4  165.8    2.6 1547.3  0.0  2.4    0.0   14.2   0  99 c0t0d0
    0.0    6.6    0.0   90.7  0.0  0.0    0.0    4.2   0   3 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    2.0    0.0   16.0  0.0  0.0    0.0    1.0   0   0 c2t5d0
    1.0   44.2    7.2  261.0  0.0  0.1    0.0    1.2   0   5 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:30 2004
     cpu
 us sy wt id
 34 30 25 12
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    7.4    0.0   66.0  0.0  0.3    0.0   40.0   0  30 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.6    0.0   22.4  0.0  0.1    0.0   32.2   0   3 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    7.4    0.0   66.0  0.0  0.3    0.0   39.9   0  30 d10
    0.0    7.2    0.0   64.4  0.0  0.0    0.0    4.5   0   3 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.4    0.0   11.2  0.0  0.0    0.0   18.3   0   3 d30
    0.0    1.2    0.0    9.6  0.0  0.0    0.0    5.5   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.2  162.4    9.6 1432.0  0.0  2.4    0.0   14.8   0  99 c0t0d0
    0.0    8.4    0.0   74.0  0.0  0.0    0.0    4.6   0   4 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    2.0    0.0   16.0  0.0  0.0    0.0    1.0   0   0 c2t5d0
    0.4   32.6    8.2  173.8  0.0  0.0    0.0    0.9   0   3 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:35 2004
     cpu
 us sy wt id
 24 26 32 18
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    5.8    0.0   61.6  0.0  0.2    2.7   42.4   2  25 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   1 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    5.8    0.0   61.6  0.0  0.2    0.0   42.4   0  25 d10
    0.0    6.0    0.0   73.8  0.0  0.0    0.0    5.8   0   3 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   1 d30
    0.0    0.2    0.0   17.6  0.0  0.0    0.0   13.4   0   0 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  169.8    0.0 1276.2  0.0  2.5    0.0   15.0   0  99 c0t0d0
    0.0    7.4    0.0   92.0  0.0  0.0    0.0    6.5   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    0.6   53.4    3.4  312.8  0.0  0.1    0.0    1.0   0   5 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:40 2004
     cpu
 us sy wt id
 22 31 29 18
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    7.4    0.0   92.4  0.0  0.4    1.5   52.0   1  31 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    2.8    0.0   52.8  0.0  0.2    0.0   55.2   0   9 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    7.4    0.0   92.4  0.0  0.3    0.0   41.3   0  31 d10
    0.0    7.4    0.0   80.4  0.0  0.0    0.0    5.2   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    2.8    0.0   52.8  0.0  0.1    0.0   30.4   0   9 d30
    0.0    2.6    0.0   35.2  0.0  0.0    0.0    6.5   0   2 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.2  162.8    0.4 1324.6  0.0  2.5    0.0   15.1   0  99 c0t0d0
    0.0   10.2    0.0  115.7  0.0  0.1    0.0    5.8   0   6 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    4.4   67.0   34.4  400.8  0.0  0.1    0.0    1.3   0   7 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:45 2004
     cpu
 us sy wt id
 22 23 34 20
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0   12.2    0.0  103.4  0.1  0.5    8.0   42.0  10  37 d1
    0.0    7.8    0.0   62.4  0.3  0.3   38.0   41.5  30  21 d2
    0.0    1.6    0.0   10.2  0.1  0.1   62.7   63.3  10  10 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0   12.2    0.0  103.4  0.0  0.5    0.0   41.3   0  37 d10
    0.0   12.0    0.0  103.2  0.0  0.2    0.0   13.1   0  11 d11
    0.0    7.8    0.0   62.4  0.0  0.3    0.0   41.3   0  21 d20
    0.0    7.8    0.0   62.4  0.0  0.1    0.0   17.2   0   9 d21
    0.0    1.8    0.0   15.0  0.0  0.1    0.0   54.0   0  10 d30
    0.0    2.0    0.0   16.6  0.0  0.0    0.0    9.9   0   2 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.4  153.6   11.2 1115.3  0.0  3.5    0.0   22.6   0 100 c0t0d0
    0.0   30.0    0.0  186.3  0.0  0.5    0.0   17.9   0  27 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.2    0.0    0.2  0.0  0.0    0.0    0.7   0   0 c2t5d0
    0.4  106.8    4.8  764.6  0.1  0.3    1.3    3.0   1   6 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:50 2004
     cpu
 us sy wt id
 25 31 27 17
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.0    0.0   62.0  0.0  0.2    2.5   40.1   1  23 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.2    0.0   25.6  0.0  0.1   40.9   64.6   5   5 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.2    0.0   65.4  0.0  0.2    0.0   37.0   0  23 d10
    0.0    6.4    0.0   67.0  0.0  0.0    0.0    6.1   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.0    0.0   20.8  0.0  0.0    0.0   48.1   0   5 d30
    0.0    0.8    0.0   19.2  0.0  0.0    0.0    4.9   0   0 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  166.8    0.0 1301.5  0.0  2.4    0.0   14.3   0  99 c0t0d0
    0.0    9.2    0.0   93.9  0.0  0.1    0.0    5.9   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.2    5.6    1.6   48.0  0.0  0.0    0.0    1.1   0   1 c2t5d0
    0.6   70.0    7.2  396.4  0.0  0.1    0.0    0.9   0   6 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:12:55 2004
     cpu
 us sy wt id
 43 33 15  9
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.0    0.0   60.4  0.0  0.2    0.6   33.4   0  18 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    0.4    0.0   14.4  0.0  0.0    0.0   48.5   0   1 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.0    0.0   62.4  0.0  0.2    0.0   30.7   0  18 d10
    0.0    6.0    0.0   62.4  0.0  0.0    0.0    6.2   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.6    0.0   20.8  0.0  0.0    0.0   22.9   0   1 d30
    0.0    0.8    0.0   22.4  0.0  0.0    0.0   12.3   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.2  162.6    3.4 1213.4  0.0  2.0    0.0   12.0   0  96 c0t0d0
    0.0    7.6    0.0   85.2  0.0  0.1    0.0    7.4   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.2    5.8    1.6   64.0  0.0  0.0    0.0    1.3   0   1 c2t5d0
    0.6   49.8    9.6  916.2  0.0  0.1    0.0    2.7   0   6 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:00 2004
     cpu
 us sy wt id
 31 35 20 13
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    8.2    0.0   94.4  0.0  0.3    0.0   35.8   0  28 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    2.2    0.0   21.2  0.0  0.1   12.4   23.6   3   4 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    8.0    0.0   89.0  0.0  0.3    0.0   34.4   0  28 d10
    0.0    7.8    0.0   87.4  0.0  0.0    0.0    5.4   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    2.0    0.0   14.8  0.0  0.0    0.0   19.2   0   4 d30
    0.0    1.8    0.0   13.2  0.0  0.0    0.0    7.6   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.6  164.2    1.0 1223.0  0.0  2.4    0.0   14.5   0  98 c0t0d0
    0.0   11.0    0.0  104.5  0.0  0.1    0.0    6.2   0   7 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    5.4    0.0   57.6  0.0  0.0    0.0    1.6   0   0 c2t5d0
    0.8   38.8   17.0  218.4  0.0  0.0    0.0    1.0   0   4 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:05 2004
     cpu
 us sy wt id
 36 43 14  7
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.0    0.0   72.8  0.0  0.2    3.6   29.1   2  17 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.2    0.0   16.0  0.0  0.1    0.6   60.7   0   4 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.0    0.0   72.8  0.0  0.2    0.0   28.9   0  17 d10
    0.0    6.2    0.0   74.4  0.0  0.0    0.0    6.0   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.2    0.0   16.0  0.0  0.0    0.0   31.8   0   4 d30
    0.0    1.2    0.0   16.0  0.0  0.0    0.0    4.6   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  162.0    0.0 1543.7  0.0  2.4    0.0   14.9   0  98 c0t0d0
    0.0    8.4    0.0   90.9  0.0  0.1    0.0    6.3   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.2    0.0    1.6  0.0  0.0    0.0    1.1   0   0 c2t5d0
    5.6   74.0   90.2  436.8  0.0  0.2    0.0    2.0   0  10 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:10 2004
     cpu
 us sy wt id
 37 47 11  5
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0   12.0    0.0  108.2  0.0  0.4    3.5   34.6   4  37 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.2    0.6    1.6   24.0  0.0  0.0   11.1   41.9   1   3 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0   12.0    0.0  108.2  0.0  0.4    0.0   34.4   0  37 d10
    0.0   11.8    0.0  106.6  0.0  0.1    0.0    6.3   0   7 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.6    0.0   24.0  0.0  0.0    0.0   50.7   0   3 d30
    0.2    0.8    1.6   32.0  0.0  0.0    0.0   13.1   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  162.0    0.0 1410.9  0.0  2.5    0.0   15.5   0  99 c0t0d0
    0.2   13.6    1.6  139.1  0.0  0.1    0.0    7.5   0   8 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    4.0    0.0   33.6  0.0  0.0    0.0    1.1   0   0 c2t5d0
   21.4  102.0 1682.5 3796.3  0.0  0.5    0.0    4.1   0  30 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:15 2004
     cpu
 us sy wt id
 21 33 30 16
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    8.8    0.0   76.8  0.2  0.4   18.6   41.4  16  29 d1
    0.0    6.4    0.0   51.2  0.3  0.3   48.8   43.0  31  21 d2
    0.0    5.8    0.0   59.8  0.1  0.3   17.6   46.6  10  19 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    8.8    0.0   76.8  0.0  0.4    0.0   41.1   0  29 d10
    0.0    8.8    0.0   76.8  0.0  0.1    0.0   12.7   0   9 d11
    0.0    6.4    0.0   51.2  0.0  0.3    0.0   43.0   0  21 d20
    0.0    6.4    0.0   51.2  0.0  0.1    0.0   15.6   0   8 d21
    0.0    5.8    0.0   59.8  0.0  0.2    0.0   38.7   0  19 d30
    0.0    5.6    0.0   51.8  0.0  0.1    0.0   10.6   0   5 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  155.2    0.0 1128.1  0.0  3.5    0.0   22.7   0  99 c0t0d0
    0.0   29.8    0.0  188.4  0.0  0.5    0.0   16.7   0  27 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    8.4    0.0   67.4  0.0  0.0    0.0    1.8   0   1 c2t5d0
    0.8  134.8    7.4  963.0  0.1  0.4    1.0    3.2   1   9 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:20 2004
     cpu
 us sy wt id
 11 16 41 32
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.4    0.0   79.8  0.0  0.3    3.1   39.9   2  24 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    0.2    0.0    6.4  0.0  0.0    0.0   16.6   0   0 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.4    0.0   79.8  0.0  0.3    0.0   39.1   0  24 d10
    0.0    6.6    0.0   80.0  0.0  0.0    0.0    4.5   0   3 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.2    0.0    6.4  0.0  0.0    0.0   16.5   0   0 d30
    0.0    0.2    0.0    6.4  0.0  0.0    0.0   12.2   0   0 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  168.0    0.0 1259.9  0.0  2.5    0.0   15.1   0 100 c0t0d0
    0.0    7.0    0.0   86.5  0.0  0.0    0.0    4.9   0   3 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    1.6    0.0   12.8  0.0  0.0    0.0    1.1   0   0 c2t5d0
    1.0   70.4   21.4  417.4  0.0  0.1    0.0    1.1   0   8 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:25 2004
     cpu
 us sy wt id
 24 31 28 18
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    7.6    0.0   84.6  0.0  0.3    0.5   40.4   0  30 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   1 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    7.6    0.0   84.6  0.0  0.3    0.0   40.4   0  30 d10
    0.0    7.4    0.0   84.4  0.0  0.0    0.0    5.9   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    0.2    0.0   12.8  0.0  0.0    0.0   70.3   0   1 d30
    0.0    0.4    0.0   14.4  0.0  0.0    0.0    7.5   0   0 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.0  159.8    0.0 1236.1  0.0  2.4    0.0   15.3   0  98 c0t0d0
    0.0    8.6    0.0   99.2  0.0  0.1    0.0    6.4   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    2.6    0.0   20.8  0.0  0.0    0.0    1.0   0   0 c2t5d0
    6.6   55.6   67.0  386.4  0.0  0.1    0.0    2.0   0   8 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:30 2004
     cpu
 us sy wt id
 42 51  5  2
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    7.6    0.0   69.2  0.0  0.3    0.0   44.7   0  34 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    2.4    0.0   38.4  0.0  0.1    0.0   34.7   0   4 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    7.6    0.0   69.2  0.0  0.3    0.0   44.7   0  34 d10
    0.0    7.8    0.0   75.2  0.0  0.0    0.0    4.4   0   3 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    2.4    0.0   33.6  0.0  0.0    0.0   19.8   0   4 d30
    0.0    2.4    0.0   33.6  0.0  0.0    0.0    6.4   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.8  166.3    5.6 1242.1  0.0  2.5    0.0   14.8   0  98 c0t0d0
    0.0   10.2    0.0  108.7  0.0  0.0    0.0    4.9   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    7.2  111.7   62.4 4775.7  0.0  0.5    0.0    4.0   0  24 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:35 2004
     cpu
 us sy wt id
 42 51  6  1
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.8    0.0   68.8  0.0  0.3    0.0   46.4   0  29 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.0    0.0   14.4  0.0  0.0    0.0   48.5   0   3 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    7.0    0.0   81.2  0.0  0.3    0.0   41.1   0  29 d10
    0.0    7.0    0.0   76.8  0.0  0.0    0.0    4.6   0   3 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.0    0.0   19.2  0.0  0.0    0.0   26.5   0   3 d30
    0.0    1.0    0.0   19.2  0.0  0.0    0.0    7.3   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.2  162.7   11.4 1295.7  0.0  2.4    0.0   14.4   0  98 c0t0d0
    0.0    8.6    0.0   96.4  0.0  0.0    0.0    5.2   0   4 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    0.6   52.4    4.8 1325.0  0.0  0.2    0.0    2.9   0   8 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:40 2004
     cpu
 us sy wt id
 40 53  6  1
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.8    0.0   70.6  0.0  0.3    0.8   39.2   1  24 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.8    0.0   30.4  0.0  0.0    0.0   25.9   0   3 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.8    0.0   61.8  0.0  0.2    0.0   35.8   0  24 d10
    0.0    6.8    0.0   61.8  0.0  0.0    0.0    5.4   0   4 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.6    0.0   17.6  0.0  0.0    0.0   19.5   0   3 d30
    0.0    1.4    0.0   16.0  0.0  0.0    0.0    7.3   0   1 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    1.2  171.0    8.4 1268.5  0.0  2.3    0.0   13.5   0  99 c0t0d0
    0.0    8.4    0.0   77.9  0.0  0.1    0.0    6.1   0   5 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    1.0   79.2   10.0  431.2  0.0  0.1    0.0    1.9   0   8 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0
Fri Apr 23 14:13:45 2004
     cpu
 us sy wt id
 41 51  6  2
                    extended device statistics              
    r/s    w/s   kr/s   kw/s wait actv wsvc_t asvc_t  %w  %b device
    0.0    6.8    0.0   74.4  0.1  0.3   17.6   47.1  12  26 d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d2
    0.0    1.8    0.0   16.6  0.1  0.1   50.1   41.0   9   7 d3
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d4
    0.0    6.6    0.0   70.8  0.0  0.3    0.0   46.9   0  26 d10
    0.0    6.6    0.0   70.8  0.0  0.1    0.0   10.3   0   5 d11
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d20
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d21
    0.0    1.8    0.0   16.6  0.0  0.1    0.0   40.9   0   7 d30
    0.0    2.0    0.0   29.4  0.0  0.0    0.0   12.4   0   2 d31
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d40
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 d41
    0.2  168.2    1.6 1327.9  0.0  3.0    0.0   17.9   0  97 c0t0d0
    0.0   11.4    0.0  101.6  0.0  0.2    0.0   13.4   0  10 c0t1d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c0t6d0
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 c2t5d0
    0.6  144.2    3.4 1029.7  0.4  0.5    2.8    3.5   2   9 c2t5d1
    0.0    0.0    0.0    0.0  0.0  0.0    0.0    0.0   0   0 rmt/0


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